VLSI Implementation of RAKE Receivers With and Without Maximal Ratio Combining - presented by Tim Mazumdar

Login

About Tim Mazumdar

Tim has 30 years of IC design exp. and a PhD in Digital Communications from Coventry University. He has worked for IC design houses / EDA companies like Synopsys and Cadence and Wafer Fabs like Globalfoundries

Home > On-Demand Archives > Talks >

VLSI Implementation of RAKE Receivers With and Without Maximal Ratio Combining

Tim Mazumdar - Watch Now - DSP Online Conference 2022 - Duration: 15:44

VLSI Implementation of RAKE Receivers With and Without Maximal Ratio Combining

Tim Mazumdar

Abstract Questions & Comments

Why RAKE receivers for WCDMA and UWB- advantages for RAKE receivers.
What is Maximal Ratio combining.
What are the different classes of RAKE receiver.
How to implement a RAKE on FPGA - optimization for maximum throughput.
Discussion of results.

M↓ MARKDOWN HELP

italics	surround text with asterisks
bold	surround text with two asterisks
hyperlink	[hyperlink](https://example.com) or just a bare URL
code	surround text with `backticks`
~~strikethrough~~	surround text with ~~two tilde characters~~
quote	prefix with >

Upvotes Newest Oldest

No comments or questions yet. Will you be the one who will break the ice?

OUR PARTNERS