In audio applications you often need to convert audio streams from one sampling domain to another. When the clocks of these domains are unrelated and possible drifting, you’ll need an asynchronous sample rate converter. In this talk we'll discuss ways to implement these with a minimal number of multiplications per sample, using multistage, multirate IIR filters based on all-pass filters and halfband filters, and polynomial interpolation using normal, transposed and partially transposed Farrow structures.

This guide was created with the help of AI, based on the presentation's transcript. Its goal is to give you useful context and background so you can get the most out of the session.

What this presentation is about and why it matters

This talk explores practical designs for high-quality asynchronous sample rate converters (SRCs) — converters that move audio or other sampled data between two clocks that are unrelated and may drift. The presenter shows how to approximate the unattainable perfect converter (the sinc/brick-wall ideal) with a combination of polynomial interpolation (Farrow-style structures), multistage up/down sampling filters, and efficient IIR implementations based on coupled all-pass and halfband structures.

Why this matters: in real systems (audio interfaces, wireless receivers, sensor fusion, mixed-clock audio paths) you often must translate between domains driven by independent clocks. A poor converter creates audible artifacts, spurs and aliasing. Good converters that use few multiplications, share hardware resources and tolerate clock drift are crucial for cost-, power- and area-constrained embedded systems.

Who will benefit the most from this presentation

• DSP engineers designing audio or multi-clock data paths who need practical SRC designs with low computational cost.
• Hardware architects and FPGA/ASIC designers looking to share multiply-accumulate resources and implement efficient IIR up/down-sampling stages.
• Students and engineers wanting a concise tour of Farrow interpolation, coupled all-pass lattice filters, and how PLLs can be used to track fractional phase between clocks.

What you need to know

To get the most from the talk you should be comfortable with these basic concepts:

• Sampling theorem and ideal interpolation: the continuous-time signal can be reconstructed from discrete samples if band-limited. The ideal interpolator uses the sinc kernel: $\mathrm{sinc}(t)=\frac{\sin(\pi t)}{\pi t}$. Real implementations approximate this kernel.
• Aliasing and imaging: when converting between rates, frequency replicas (images) and overlapping spectra cause aliasing unless filtered. Multistage filtering spreads the work across stages.
• Upsampling and downsampling basics: zero-stuffing (upsampling), decimation (downsampling), and the need for anti-imaging / anti-aliasing filtering around the Nyquist edges.
• Polynomial interpolation and Farrow structures: represent a local interpolation kernel as a polynomial in the fractional offset $\phi$. A general polynomial is $P(\phi)=a_n\phi^n+\dots+a_0$, and Horner's method evaluates it efficiently as $(((a_n\phi+a_{n-1})\phi+\dots)+a_0)$.
• Normal vs transposed Farrow: the difference is the data/time basis (input-sample-aligned versus output-sample-aligned kernels). Each has pros/cons for up/down sampling and computational scaling. The presenter also proposes an enhanced transposed Farrow that mixes rectangular pulses to improve zero placement and reduce multipliers.
• IIR alternatives and coupled all-pass lattices: IIR filters (all-pass based) can be implemented with fewer multipliers than cascaded biquads. A coupled all-pass sum creates a magnitude response by phase cancellation and can be optimized to reduce multiplies to roughly N for order-N designs.
• Clock tracking: computing the fractional phase $\phi$ requires measuring input and output clock increments. Small PLL-like controllers per clock and a third loop that forms their ratio are used to produce the fractional phase for interpolation.

Glossary

• Sample rate converter (SRC): A block that converts a sampled sequence from one clock rate to another, preserving signal content as much as practical.
• Asynchronous: Input and output clocks are unrelated and may drift; they are not phase-locked to a common reference.
• Sinc interpolation: The ideal reconstruction kernel $\mathrm{sinc}(t)=\sin(\pi t)/(\pi t)$ that yields perfect band-limited reconstruction but is unrealizable (infinite, noncausal).
• Farrow structure: A family of polynomial interpolation implementations that factor kernel evaluation into fixed coefficient filters plus a polynomial evaluator (normal and transposed variants).
• Polynomial interpolation: Approximating a local continuous-time kernel by a polynomial in the fractional delay $\phi$, evaluated efficiently with Horner's method.
• All-pass filter (coupled): An IIR structure that preserves magnitude but reshapes phase; combining two branches with complementary phase can produce low-pass behavior.
• Halfband filter: A filter with cutoff at half the Nyquist frequency. For FIR halfband, half of the coefficients are zero, enabling efficient implementation; useful in multistage resampling.
• Polyphase: A computational reorganization that exploits periodicity in up/down samplers to run subfilters at lower rates for efficiency.
• Phase-locked loop (PLL): A control system that locks a local oscillator to an input clock, here used to derive phase increments and handle small clock drifts.
• CIC filter: Cascaded Integrator-Comb, a multiplier-free multirate FIR used for large integer-rate changes but with limited spectral placement of zeros.

Why watch this talk

The speaker combines clear practical intuition with concrete implementation tricks: efficient Farrow variants, a minimal-multiply IIR all-pass ladder, and a neat PLL-based phase estimator. If you care about audio quality, low-cost hardware, or elegant DSP engineering, you will find useful patterns and trade-offs to apply in real projects. The presentation is pragmatic, grounded in implementable examples, and includes measured complexity counts — exactly the sort of talk engineers can turn into working designs.