The Filtering Onion: Five Questions from the Filter Wizard

In a career spent chasing information hidden in all forms of signals, I've boiled down the art of filtering to five essential questions:

1. Why are you filtering?
2. What are you filtering?
3. Where are you filtering?
4. When are you filtering?
5. How are you filtering?

These questions lead to another layer of the onion, prompting you to evaluate your approach:

1. Is it too complex or too simple?
2. Is it too fancy or too naive?
3. Is it too obscure or too obvious?
4. Is it too much or too little?
5. Is it too early or too late?

And deep inside this onion, we might uncover some "mythconceptions" that need to be battled, in the true spirit of The Filter Wizard.

This guide was created with the help of AI, based on the presentation's transcript. Its goal is to give you useful context and background so you can get the most out of the session.

What this presentation is about and why it matters

This talk is a practical, story-driven tour of real-world filtering: why engineers add filters, where they sit in a system, and how design and implementation choices change what your filter actually does. Rather than a purely mathematical lecture, the speaker uses decades of experience to expose common traps (precision loss, phase surprises, implementation mismatches) and to show pragmatic workarounds that matter when filters are deployed in products, measurement systems, or signal chains.

Why it matters: filters are everywhere — from front-end anti-aliasing and power-line notches to audio decimators and RMS measurement blocks. Small design assumptions (bit depth, filter topology, where the filter runs in the chain, or how you implement it in fixed-point/floating-point hardware) can produce large, unexpected errors in amplitude, phase, latency, and noise performance. This talk highlights those practical pitfalls and shows useful patterns to reduce risk.

Who will benefit the most from this presentation

• Embedded and DSP engineers who implement filters on ADC/DSP/FPGA platforms and must trade-off precision, latency, and resource usage.
• Signal-processing practitioners designing measurement, audio, or communications chains who need to understand how filter choice affects time-domain behaviour and system-level accuracy.
• Students and learners who want a bridge between filter theory (FIR/IIR, frequency response, phase/group delay) and messy real-world constraints (bit truncation, numerical conditioning, bilinear transform effects).
• Managers or system architects who must evaluate filter-related risk without getting lost in math — the talk stresses questions you should always ask before adding a filter.

What you need to know

This talk assumes familiarity with basic signal-processing concepts and some implementation experience. Key background to get the most out of the presentation:

• Time and frequency domains: know what a spectrum (FFT) shows and why windowing matters when you observe narrowband features.
• FIR vs IIR filters: know that FIR filters can be linear phase (symmetric impulse response) and IIRs are generally more compact but often have nonlinear phase. The talk shows how IIRs can still be made to behave acceptably with phase equalization.
• Phase, group delay, and latency: group delay is the slope of phase versus frequency. Filters with constant group delay preserve waveform shape; unequal or frequency-dependent group delay introduces time shifts and distortion of transients. The talk explores zero and negative group-delay tricks like cascading $H$ with $(2 - H)$ or using factors such as $(2 - z^{-4})$ to alter DC group delay.
• Quantization and bit depth: understand how truncating filter outputs to a lower bit depth can throw away the noise-reduction benefit of higher internal precision. If a filter engine computes at 24 bits but you reduce outputs to 16 bits, some noise-improvement can be lost.
• Bilinear transform and pre-warping: converting analog prototypes to digital via bilinear transform compresses the frequency axis; you must pre-warp or design for the transform if you want target phase or group-delay behaviour in the z-plane.
• Numerical conditioning: decomposing filters into roots and recombining can be ill-conditioned for long filters; finite-precision arithmetic issues (fixed or floating) matter when implementing truncated IIRs like $1/(1 - z^{-1})$ approximations.

Glossary

• FIR (Finite Impulse Response) — A filter whose impulse response is finite in length; can be made linear phase when symmetric.
• IIR (Infinite Impulse Response) — A filter with feedback; compact but typically nonlinear phase unless explicitly equalized.
• Group delay — The derivative of phase with respect to frequency; represents the envelope delay of signals across frequency.
• Bilinear transform — A mapping from s-plane analog prototypes to the z-plane; it warps frequency and requires pre-warping for certain design goals.
• Windowed-sinc — A straightforward FIR design where a sinc kernel is windowed; predictable zero crossings and smooth coefficient decay.
• Phase equalizer (all-pass) — A network that alters phase/group delay without changing magnitude, used to flatten group delay across a band.
• Quantization noise — Error introduced when reducing numeric precision (ADC bit depth or truncated filter outputs).
• Truncated IIR — A numerical approximation that limits an infinite response (e.g., using $1 - z^{-N}$ factors) — can introduce cancellation and precision pitfalls.
• Pole-zero conditioning — Numerical sensitivity that arises when manipulating the polynomial roots of high-order filters.
• Zero group delay at DC — A filter design objective where the net group delay around DC is nulled (useful for certain prediction or RMS tasks).

Tip before you watch: have an example system (ADC rate and bit depth, or a short test signal) in mind so you can map the anecdotes and rules-of-thumb in the talk to a concrete design decision you face.